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Program
Session 2 : Modeling, Reconfiguration, Verification, Physical Design, back to previous page
14h00
– 15h40
Thursday 7th October 2010 |
Model Driven Engineering of Real Time and Embedded Systems
Marcio
F. S. Oliveira, Marco A. Wehrmeister (UDESC, BR), Carlos E.
Pereira , Flavio Wagner (UFRGS, BR), Franz Rammig (Univ. of
Paderborn, GER)
Use of Partial Dynamic Reconfiguration for Fault-Tolerance Processor Design
Monica
Magalhães Pereira (UFRGS, BR), Lars Braun , Michael Hübner,
Jürgen Becker, (Karlsruhe Institute of Technology, GER), Luigi Carro
(UFRGS, BR)
Functional Verification and Challenges
S. N. Pagliarini, F. L. Kastensmidt (Graduate Program on Microelectronics - UFRGS, BR)
Non-Intrusive Hybrid Signature-Based Technique to Detect SEU and SET Faults in Microprocessors
José Rodrigo Azambuja, Fernando Sousa, Lucas Rosa, Fernanda Lima Kastensmidt (PGMICRO, PPGC , UFRGS)
Design Automation of Transistor Networks
Ricardo Reis (UFRGS, BR)
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